Xemu [doxygen]  hyppo 0a42be3a057156924bc1b626a687bd6e27349c45 @ Sat 19 Mar 02:15:11 CET 2022
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1 /* Nuked OPL3
2  * Copyright (C) 2013-2020 Nuke.YKT
3  *
4  * This file is part of Nuked OPL3.
5  *
6  * Nuked OPL3 is free software: you can redistribute it and/or modify
7  * it under the terms of the GNU Lesser General Public License as
8  * published by the Free Software Foundation, either version 2.1
9  * of the License, or (at your option) any later version.
10  *
11  * Nuked OPL3 is distributed in the hope that it will be useful,
12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
14  * GNU Lesser General Public License for more details.
15  *
16  * You should have received a copy of the GNU Lesser General Public License
17  * along with Nuked OPL3. If not, see <https://www.gnu.org/licenses/>.
19  * Nuked OPL3 emulator.
20  * Thanks:
21  * MAME Development Team(Jarek Burczynski, Tatsuyuki Satoh):
22  * Feedback and Rhythm part calculation information.
23  * forums.submarine.org.uk(carbon14, opl3):
24  * Tremolo and phase generator calculation information.
25  * OPLx decapsulated(Matthew Gambrell, Olli Niemitalo):
26  * OPL2 ROMs.
27  * siliconpr0n.org(John McMaster, digshadow):
28  * YMF262 and VRC VII decaps and die shots.
29  *
30  * version: 1.8
31  */
36 #include <inttypes.h>
38 #define OPL_WRITEBUF_SIZE 1024
41 typedef struct _opl3_slot opl3_slot;
42 typedef struct _opl3_channel opl3_channel;
43 typedef struct _opl3_chip opl3_chip;
45 struct _opl3_slot {
48  int16_t out;
49  int16_t fbmod;
50  int16_t *mod;
51  int16_t prout;
52  uint16_t eg_rout;
53  uint16_t eg_out;
54  uint8_t eg_inc;
55  uint8_t eg_gen;
56  uint8_t eg_rate;
57  uint8_t eg_ksl;
58  uint8_t *trem;
59  uint8_t reg_vib;
60  uint8_t reg_type;
61  uint8_t reg_ksr;
62  uint8_t reg_mult;
63  uint8_t reg_ksl;
64  uint8_t reg_tl;
65  uint8_t reg_ar;
66  uint8_t reg_dr;
67  uint8_t reg_sl;
68  uint8_t reg_rr;
69  uint8_t reg_wf;
70  uint8_t key;
71  uint32_t pg_reset;
72  uint32_t pg_phase;
73  uint16_t pg_phase_out;
74  uint8_t slot_num;
75 };
77 struct _opl3_channel {
81  int16_t *out[4];
82  uint8_t chtype;
83  uint16_t f_num;
84  uint8_t block;
85  uint8_t fb;
86  uint8_t con;
87  uint8_t alg;
88  uint8_t ksv;
89  uint16_t cha, chb;
90  uint8_t ch_num;
91 };
93 typedef struct _opl3_writebuf {
94  uint64_t time;
95  uint16_t reg;
96  uint8_t data;
99 struct _opl3_chip {
102  uint16_t timer;
103  uint64_t eg_timer;
104  uint8_t eg_timerrem;
105  uint8_t eg_state;
106  uint8_t eg_add;
107  uint8_t newm;
108  uint8_t nts;
109  uint8_t rhy;
110  uint8_t vibpos;
111  uint8_t vibshift;
112  uint8_t tremolo;
113  uint8_t tremolopos;
114  uint8_t tremoloshift;
115  uint32_t noise;
116  int16_t zeromod;
117  int32_t mixbuff[2];
118  uint8_t rm_hh_bit2;
119  uint8_t rm_hh_bit3;
120  uint8_t rm_hh_bit7;
121  uint8_t rm_hh_bit8;
122  uint8_t rm_tc_bit3;
123  uint8_t rm_tc_bit5;
124  //OPL3L
125  int32_t rateratio;
126  int32_t samplecnt;
127  int16_t oldsamples[2];
128  int16_t samples[2];
131  uint32_t writebuf_cur;
132  uint32_t writebuf_last;
135 };
137 void OPL3_Generate(opl3_chip *chip, int16_t *buf);
138 void OPL3_GenerateResampled(opl3_chip *chip, int16_t *buf1, int16_t *buf2);
139 void OPL3_Reset(opl3_chip *chip, uint32_t samplerate);
140 void OPL3_WriteReg(opl3_chip *chip, uint16_t reg, uint8_t v);
141 void OPL3_WriteRegBuffered(opl3_chip *chip, uint16_t reg, uint8_t v);
142 //void OPL3_GenerateStream(opl3_chip *chip, int16_t *sndptr, uint32_t numsamples, uint32_t increment);
143 void OPL3_GenerateStream(opl3_chip *chip, int16_t *sndptr1, int16_t *sndptr2, uint32_t numsamples, const uint32_t increment1, const uint32_t increment2 );
144 #endif
opl3_channel * pair
Definition: opl3.h:79
Definition: opl3.h:38
uint32_t writebuf_last
Definition: opl3.h:132
void OPL3_WriteReg(opl3_chip *chip, uint16_t reg, uint8_t v)
Definition: opl3.c:1245
uint16_t eg_out
Definition: opl3.h:53
int32_t mixbuff[2]
Definition: opl3.h:117
uint8_t key
Definition: opl3.h:70
uint8_t eg_state
Definition: opl3.h:105
void OPL3_Generate(opl3_chip *chip, int16_t *buf)
Definition: opl3.c:1050
uint8_t rm_hh_bit7
Definition: opl3.h:120
uint32_t pg_phase
Definition: opl3.h:72
uint8_t reg_wf
Definition: opl3.h:69
uint16_t cha
Definition: opl3.h:89
uint8_t reg_dr
Definition: opl3.h:66
uint8_t rhy
Definition: opl3.h:109
int16_t samples[2]
Definition: opl3.h:128
uint8_t reg_tl
Definition: opl3.h:64
uint8_t reg_ksr
Definition: opl3.h:61
uint64_t writebuf_samplecnt
Definition: opl3.h:130
int32_t rateratio
Definition: opl3.h:125
uint8_t reg_sl
Definition: opl3.h:67
uint8_t vibpos
Definition: opl3.h:110
uint8_t reg_ksl
Definition: opl3.h:63
uint16_t f_num
Definition: opl3.h:83
void OPL3_Reset(opl3_chip *chip, uint32_t samplerate)
Definition: opl3.c:1198
uint8_t nts
Definition: opl3.h:108
int16_t fbmod
Definition: opl3.h:49
uint8_t data
Definition: opl3.h:96
int32_t samplecnt
Definition: opl3.h:126
int16_t out
Definition: opl3.h:48
uint8_t reg_ar
Definition: opl3.h:65
uint8_t tremoloshift
Definition: opl3.h:114
uint8_t alg
Definition: opl3.h:87
uint32_t noise
Definition: opl3.h:115
uint64_t eg_timer
Definition: opl3.h:103
uint8_t newm
Definition: opl3.h:107
void OPL3_WriteRegBuffered(opl3_chip *chip, uint16_t reg, uint8_t v)
Definition: opl3.c:1344
opl3_slot * slots[2]
Definition: opl3.h:78
uint8_t ksv
Definition: opl3.h:88
opl3_slot slot[36]
Definition: opl3.h:101
uint8_t eg_inc
Definition: opl3.h:54
uint16_t pg_phase_out
Definition: opl3.h:73
uint8_t eg_add
Definition: opl3.h:106
uint8_t rm_hh_bit8
Definition: opl3.h:121
uint8_t vibshift
Definition: opl3.h:111
uint32_t writebuf_cur
Definition: opl3.h:131
uint8_t tremolo
Definition: opl3.h:112
uint8_t reg_mult
Definition: opl3.h:62
opl3_chip * chip
Definition: opl3.h:80
int16_t * out[4]
Definition: opl3.h:81
uint8_t slot_num
Definition: opl3.h:74
uint8_t con
Definition: opl3.h:86
uint8_t eg_rate
Definition: opl3.h:56
uint8_t rm_tc_bit3
Definition: opl3.h:122
opl3_channel channel[18]
Definition: opl3.h:100
uint8_t chtype
Definition: opl3.h:82
uint8_t rm_hh_bit3
Definition: opl3.h:119
uint8_t reg_type
Definition: opl3.h:60
uint64_t time
Definition: opl3.h:94
Definition: opl3.h:45
uint8_t reg_rr
Definition: opl3.h:68
uint8_t tremolopos
Definition: opl3.h:113
int16_t prout
Definition: opl3.h:51
uint8_t block
Definition: opl3.h:84
uint8_t fb
Definition: opl3.h:85
uint8_t eg_gen
Definition: opl3.h:55
int16_t * mod
Definition: opl3.h:50
uint8_t reg_vib
Definition: opl3.h:59
Definition: opl3.h:77
void OPL3_GenerateResampled(opl3_chip *chip, int16_t *buf1, int16_t *buf2)
Definition: opl3.c:1182
uint8_t * trem
Definition: opl3.h:58
uint16_t eg_rout
Definition: opl3.h:52
Definition: opl3.h:99
opl3_channel * channel
Definition: opl3.h:46
struct _opl3_writebuf opl3_writebuf
opl3_chip * chip
Definition: opl3.h:47
Definition: opl3.h:93
uint8_t ch_num
Definition: opl3.h:90
uint8_t rm_hh_bit2
Definition: opl3.h:118
uint16_t chb
Definition: opl3.h:89
uint64_t writebuf_lasttime
Definition: opl3.h:133
int16_t oldsamples[2]
Definition: opl3.h:127
uint8_t eg_ksl
Definition: opl3.h:57
void OPL3_GenerateStream(opl3_chip *chip, int16_t *sndptr1, int16_t *sndptr2, uint32_t numsamples, const uint32_t increment1, const uint32_t increment2)
Definition: opl3.c:1372
uint16_t reg
Definition: opl3.h:95
uint32_t pg_reset
Definition: opl3.h:71
uint16_t timer
Definition: opl3.h:102
uint8_t eg_timerrem
Definition: opl3.h:104
int16_t zeromod
Definition: opl3.h:116
uint8_t rm_tc_bit5
Definition: opl3.h:123
Uint8 buf[512]
Definition: fat32.c:155
opl3_writebuf writebuf[OPL_WRITEBUF_SIZE]
Definition: opl3.h:134