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◆ DEBUGVERA
◆ INTERRUPT_REGISTER_MASK
#define INTERRUPT_REGISTER_MASK 15 |
◆ MODE_NTSC_COMPOSITE
#define MODE_NTSC_COMPOSITE 2 |
◆ RASTER_IRQ
◆ SCANLINE_START_VSYNC
#define SCANLINE_START_VSYNC 492 |
◆ SCANLINE_STOP_VSYNC
#define SCANLINE_STOP_VSYNC 495 |
◆ SCANLINES_TOTAL
#define SCANLINES_TOTAL 525 |
◆ SPRITE_IRQ
◆ UART_CLOCK
#define UART_CLOCK 25000000 |
◆ UART_DEFAULT_BAUD_RATE
#define UART_DEFAULT_BAUD_RATE 1000000 |
◆ UART_IRQ
◆ VRAM_SIZE
#define VRAM_SIZE 0x20000 |
◆ VSYNC_IRQ
◆ vera_dump_vram()
int vera_dump_vram |
( |
const char * |
fn | ) |
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◆ vera_init()
◆ vera_read_cpu_register()
Uint8 vera_read_cpu_register |
( |
int |
reg | ) |
|
◆ vera_render_line()
int vera_render_line |
( |
void |
| ) |
|
◆ vera_reset()
◆ vera_write_cpu_register()
void vera_write_cpu_register |
( |
int |
reg, |
|
|
Uint8 |
data |
|
) |
| |
◆ addr
◆ all
◆ all_mono
◆ bitmap_palette_offset
int bitmap_palette_offset |
◆ changed
◆ chromakill
◆ colour
◆ colours
◆ counter_map
◆ counter_tile_row
◆ enabled
◆ field
◆ hscale
◆ hscroll
◆ hstart
◆ hstop
◆ hwidth
◆ inc
◆ index
◆ irqline
◆ is_mono_mode
◆ map_base
◆ maph
◆ mapw
◆ mode
◆ regspace
◆ spi_busy
◆ spi_received_data
◆ spi_select
◆ tile_base
◆ tileh
◆ tilew
◆ uart_baud_divisor
◆ uart_baud_rate
◆ vscale
◆ vscroll
◆ vstart
◆ vstop