|
| #define | BEGIN do{ |
| |
| #define | END }while(0);break; |
| |
| #define | OPCODE(n) END case n: BEGIN |
| |
| #define | DO_DISASM |
| |
| #define | DO_EXEC 1 |
| |
| #define | FLAG_CARRY 0x80 |
| |
| #define | FLAG_ZERO 0x40 |
| |
| #define | FLAG_SIGN 0x20 |
| |
| #define | FLAG_PV 0x10 |
| |
| #define | FLAG_DA 0x08 |
| |
| #define | FLAG_HC 0x04 |
| |
| #define | F_CARRY_BOOL (!!(z8k1.flags & FLAG_CARRY)) |
| |
| #define | F_ZERO_BOOL (!!(z8k1.flags & FLAG_ZERO)) |
| |
| #define | F_SIGN_BOOL (!!(z8k1.flags & FLAG_SIGN)) |
| |
| #define | F_PV_BOOL (!!(z8k1.flags & FLAG_PV)) |
| |
| #define | F_DA_BOOL (!!(z8k1.flags & FLAG_DA)) |
| |
| #define | F_HC_BOOL (!!(z8k1.flags & FLAG_HC)) |
| |
| #define | FCW_SEG 0x80 |
| |
| #define | FCW_SYS 0x40 |
| |
| #define | FCW_EPA 0x20 |
| |
| #define | FCW_VIE 0x10 |
| |
| #define | FCW_NVIE 0x08 |
| |
| #define | FCW_ALL_MASK (FCW_SEG|FCW_SYS|FCW_EPA|FCW_VIE|FCW_NVIE) |
| |
| #define | IS_SEGMENTED_MODE (z8k1.fcw & FCW_SEG) |
| |
| #define | IS_SYSTEM_MODE (z8k1.fcw & FCW_SYS) |
| |
| #define | IS_USER_MODE (!(IS_SYSTEM_MODE)) |
| |
| #define | DISASM(fmt, ...) do { if (XEMU_UNLIKELY(do_disasm)) DEBUGPRINT("%02X:%04X %04X " fmt NL, z8k1.codeseg, pc_orig, opc, __VA_ARGS__); } while(0) |
| |
| #define | NOT_EMULATED_OPCODE() FATAL("ERROR: Opcode not emulated: $%04X at $%02X:%04X", opc, z8k1.codeseg, pc_orig) |
| |
| #define | NOT_EMULATED_OPCODE_VARIANT() FATAL("ERROR: Opcode VARIANT not emulated: $%04X at $%02X:%04X", opc, z8k1.codeseg, pc_orig) |
| |
| #define | RESERVED_OPCODE() FATAL("ERROR: Reserved opcode: $%04X at $%02X:%04X\n", opc, z8k1.codeseg, pc_orig); |
| |
| #define | reg8names(n) __reg8names__[(n) & 0xF] |
| |
| #define | reg16names(n) __reg16names__[(n) & 0xF] |
| |
| #define | reg32names(n) __reg32names__[(n) & 0xF] |
| |
| #define | reg64names(n) __reg64names__[(n) & 0xF] |
| |
| #define | ccnames(n) __ccnames__[(n) & 0xF] |
| |
| #define | F_ZERO_BY8(v) (((v) & 0xFF) ? 0 : FLAG_ZERO) |
| |
| #define | F_SIGN_BY8(v) (((v) & 0x80) ? FLAG_SIGN : 0) |
| |
| #define | F_CARRY_BY8(v) (((v) & 0x100) ? FLAG_CARRY : 0) |
| |
| #define | F_OVERFLOW_BY8(ad1, ad2, res) (((((ad1) & 0x80) == ((ad2) & 0x80)) && (((ad1) & 0x80) != ((res) & 0x80))) ? FLAG_PV : 0) |
| |
| #define | F_ZERO_BY16(v) (((v) & 0xFFFF) ? 0 : FLAG_ZERO) |
| |
| #define | F_SIGN_BY16(v) (((v) & 0x8000) ? FLAG_SIGN : 0) |
| |
| #define | F_CARRY_BY16(v) (((v) & 0x10000) ? FLAG_CARRY : 0) |
| |
| #define | F_OVERFLOW_BY16(ad1, ad2, res) (((((ad1) & 0x8000) == ((ad2) & 0x8000)) && (((ad1) & 0x8000) != ((res) & 0x8000))) ? FLAG_PV : 0) |
| |
| #define | F_PARITY_BY8(v) yay |
| |
| #define | F_PARITY_BY16(v) yay |
| |
| #define | F_HALFCARRY_BY8(ad1, ad2, res) ((((ad1) ^ (ad2) ^ (res)) & 16) ? FLAG_HC : 0) |
| |
| #define | REG8INDEX(index) ((((index)&7)<<1)|(((index)&8)>>3)) |
| |
| #define | NIB3(n) (((n) >> 12) & 0xF) |
| |
| #define | NIB2(n) (((n) >> 8) & 0xF) |
| |
| #define | NIB1(n) (((n) >> 4) & 0xF) |
| |
| #define | NIB0(n) ((n) & 0xF) |
| |
| #define | OPCNIB3 NIB3(opc) |
| |
| #define | OPCNIB2 NIB2(opc) |
| |
| #define | OPCNIB1 NIB1(opc) |
| |
| #define | OPCNIB0 NIB0(opc) |
| |
1.8.17